cystech electronics corp. spec. no. : c356c3 issued date : 2011.11.03 revised date : 2014.03.04 page no. : 1/6 DTC115EC3 cystek product specification npn digital transistors (built-in resistors) DTC115EC3 features ? built-in bias resistors enable the configuration of an inverter circuit without connecting external input resistors (see equivalent circuit). ? the bias resistors consist of thin-film resistors with complete isolation to allow negative biasing of the input. they also have the advantage of almost completely eliminating parasitic effects. ? only the on/off conditions need to be set for operation, making device design easy. ? complements the dta115ec3 ? pb-free package equivalent circuit outline ordering information device package shipping DTC115EC3-0-t1-g sot-523 (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel sot-523 DTC115EC3 r1=100k , r2=100 k in(b) : base out(c) : collector gnd(e) : emitter environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pcs / tape & reel, 7? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c356c3 issued date : 2011.11.03 revised date : 2014.03.04 page no. : 2/6 DTC115EC3 cystek product specification absolute maximum ratings (ta=25 ) parameter symbol limits unit supply voltage v cc 50 v input voltage v in -10~+40 v i o 20 ma output current i o(max.) 100 ma power dissipation pd 150 mw junction temperature tj 150 q c storage temperature tstg -55~+150 q c characteristics (ta=25 ) parameter symbol min. typ. max. unit test conditions v i(off) - - 0.5 v v cc =5v, i o =100 a input voltage v i(on) 3 - - v v o =0.3v, i o =1ma output voltage v o(on) - 0.1 0.3 v i o /i i =5ma/0.25ma input current i i - - 0.15 ma v i =5v output current i o(off) - - 0.5 a v cc =50v, v i =0v dc current gain g i 82 - - - v o =5v, i o =5ma input resistance r 1 70 100 130 k : - resistance ratio r 2 /r 1 0.8 1 1.2 - - transition frequency f t - 250 - mhz v ce =10v, i c =5ma, f=100mhz* * transition frequency of the device
cystech electronics corp. spec. no. : c356c3 issued date : 2011.11.03 revised date : 2014.03.04 page no. : 3/6 DTC115EC3 cystek product specification typical characteristics current gain vs output current 10 100 1000 0.1 1 10 100 output current---i o (ma) current gain---g i vo = 5v output voltage vs output current 0.01 0.1 1 0.1 1 10 100 output current---io(ma) output voltage---v o(on) (v) io / ii = 20 input voltage vs output current(on characteristics) 0.1 1 10 100 0.1 1 10 100 output current---io(ma) input voltage---v i(on) (v) vo = 0.3v output current vs input voltage(off characteristics) 0.001 0.01 0.1 1 10 012345 input voltage ---v i(off) (v) output current---i o (ma) vcc = 5v power derating curve 0 20 40 60 80 100 120 140 160 0 50 100 150 200 ambient temperature --- ta( ) power dissipation---pd(mw)
cystech electronics corp. spec. no. : c356c3 issued date : 2011.11.03 revised date : 2014.03.04 page no. : 4/6 DTC115EC3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c356c3 issued date : 2011.11.03 revised date : 2014.03.04 page no. : 5/6 DTC115EC3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c356c3 issued date : 2011.11.03 revised date : 2014.03.04 page no. : 6/6 DTC115EC3 cystek product specification sot-523 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. style: pin 1.base (input) 2.emitter (ground) 3.collector (output) 3-lead sot-523 plastic surface mounted package cystek package code: c3 marking: 29 xx device code date code dim min. max. min. max. a 0.028 0.035 0.700 0.900 e 0.028 0.035 0.700 0.900 a1 0.000 0.004 0.000 0.100 e1 0.057 0.069 1.450 1.750 a2 0.028 0.031 0.700 0.800 e 0.020* 0.500* b1 0.006 0.010 0.150 0.250 e1 0.035 0.043 0.900 1.100 b2 0.010 0.014 0.250 0.350 l 0.016 ref 0.400 ref c 0.004 0.008 0.100 0.200 l1 0.010 0.018 0.260 0.460 d 0.059 0.067 1.500 1.700 0 8 0 8 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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